Senior Hardware Design Engineer

About this role

The era of pervasive AI has arrived. In this era, organizations will use generative AI to unlock hidden value in their data, accelerate processes, reduce costs, drive efficiency and innovation to fundamentally transform their businesses and operations at scale.

SambaNova Suite™ is the first full-stack, generative AI platform, from chip to model, optimized for enterprise and government organizations. Powered by the intelligent SN40L chip, the SambaNova Suite is a fully integrated platform, delivered on-premises or in the cloud, combined with state-of-the-art open-source models that can be easily and securely fine-tuned using customer data for greater accuracy. Once adapted with customer data, customers retain model ownership in perpetuity, so they can turn generative AI into one of their most valuable assets.

About the team

div]:bg-bg-000/50 [&_pre>div]:border-0.5 [&_pre>div]:border-border-400 [&_.ignore-pre-bg>div]:bg-transparent [&_.standard-markdown_:is(p,blockquote,h1,h2,h3,h4,h5,h6)]:pl-[var(--msg-text-inset,0.5rem)] [&_.standard-markdown_:is(p,blockquote,ul,ol,h1,h2,h3,h4,h5,h6)]:pr-8 [&_.progressive-markdown_:is(p,blockquote,h1,h2,h3,h4,h5,h6)]:pl-[var(--msg-text-inset,0.5rem)] [&_.progressive-markdown_:is(p,blockquote,ul,ol,h1,h2,h3,h4,h5,h6)]:pr-8"> _*]:min-w-0 gap-3 [&_>_*:last-child]:mb-0 print:block print:[&_>_:where(:not(:first-child))]:mt-3 standard-markdown"> The hardware design team writes the RTL for SambaNova's RDU, the processor behind our AI workload acceleration systems, covering the compute, memory, and networking subsystems. Engineers own specific blocks inside a larger subsystem, working alongside the principal engineers and architects who set its direction. A block stays with the engineer who wrote it through PPA closure, tapeout, and bring-up, so you debug your own design in silicon.

About the role

SambaNova Senior Hardware Design Engineers design component units of the Reconfigurable Dataflow Unit (RDU) ASICs deployed in our AI workload acceleration systems. You will work alongside principal engineers, architects, design verification engineers, and physical design engineers to implement innovative features in hardware that provide unique value to SambaNova.

In this role you will take ownership of blocks within a larger subsystem — contributing sections of the microarchitecture specification, writing and debugging the RTL, and carrying your blocks through implementation, tapeout, and silicon bring-up. You will grow your scope over time as you build depth in our architecture.

This role is onsite, based in either our San Jose, CA or Austin, TX office.

Responsibilities

Some of your responsibilities will include...

• Work with principal engineers and architects to author sections of the microarchitecture specification for compute, memory, or networking subsystems.

• Code, integrate, and debug SystemVerilog RTL for assigned blocks through the chip implement